DRC Reference: Netter object

The Netter object provides services related to network extraction from a layout. The relevant methods of this object are available as global functions too where they act on a default incarnation of the netter. Usually it's not required to instantiate a Netter object, but it serves as a container for this functionality.

# create a new Netter object:
nx = netter
nx.connect(poly, contact)
...

Network formation:

A basic service the Netter object provides is the formation of connected networks of conductive shapes (netting). To do so, the Netter must be given a connection specification. This happens by calling "connect" with two polygon layers. The Netter will then regard all overlaps of shapes on these layers as connections between the respective materials. Networks are the basis for netlist extraction, network geometry deduction and the antenna check.

Connections can be cleared with "clear_connections". If not, connections add atop of the already defined ones. Here is an example for the antenna check:

# build connction of poly+gate to metal1
connect(gate, poly)
connect(poly, contact)
connect(contact, metal1)

# runs an antenna check for metal1 with a ratio of 50
m1_antenna_errors = antenna_check(gate, metal1, 50.0)

# add connections to metal2
connect(metal1, via1)
connect(via1, metal2)

# runs an antenna check for metal2 with a ratio of 70.0
m2_antenna_errors = antenna_check(gate, metal2, 70.0)

# this will remove all connections made
clear_connections
...

Further functionality of the Netter object:

More methods will be added in the future to support network-related features.

"antenna_check" - Performs an antenna check

Usage:

The antenna check is used to avoid plasma induced damage. Physically, the damage happes if during the manufacturing of a metal layer with plasma etching charge accumulates on the metal islands. On reaching a certain threshold, this charge may discarge over gate oxide attached of devices attached to such metal areas hence damaging it.

Antenna checks are performed by collecting all connected nets up to a certain metal layer and then computing the area of all metal shapes and all connected gates of a certain kind (e.g. thin and thick oxide gates). The ratio of metal area divided by the gate area must not exceed a certain threshold.

A simple antenna check is this:

poly = ... # poly layer
diff = ... # diffusion layer
contact = ... # contact layer
metal1 = ... # metal layer

# compute gate area
gate = poly & diff

# note that gate and poly have to be included - gate is
# a subset of poly, but forms the sensitive area
connect(gate, poly)
connect(poly, contact)
connect(contact, metal1)
errors = antenna_check(gate, metal1, 50.0)

Usually antenna checks apply to multiple metal layers. In this case, the connectivity needs to be extended after the first check to include the next metal layers. This can be achieved with incremental connects:

# provide connections up to metal1
connect(gate, poly)
connect(poly, contact)
connect(contact, metal1)
metal1_errors = antenna_check(gate, metal1, 50.0)

# now *add* connections up to metal2
connect(metal1, via1)
connect(via1, metal2)
metal2_errors = antenna_check(gate, metal2, 50.0)

... continue this scheme with further metal layers ...

Plasma induced damage can be rectified by including diodes which create a safe current path for discharging the metal islands. Such diodes can be identified with a recognition layer (usually the diffusion area of a certain kind). You can include such diode recognition layers in the antenna check. If a connection is detected to a diode, the respective network is skipped:

...
diode = ... # diode recognition layer

connect(diode, contact)
errors = antenna_check(gate, metal1, 50.0, diode)

You can also make diode connections decreases the sensitivity of the antenna check depending on the size of the diode. The following specification makes diode connections increase the ratio threshold by 10 per square micrometer of diode area:

...
diode = ... # diode recognition layer

connect(diode, contact)
# each square micrometer of diode area connected to a network
# will add 10 to the ratio:
errors = antenna_check(gate, metal1, 50.0, [ diode, 10.0 ])

Multiple diode specifications are allowed. Just add them to the antenna_check call.

You can include the perimeter into the area computation for the gate or metal layer or both. The physical picture is this: the side walls of the material contribute to the surface too. As the side wall area can be estimated by taking the perimeter times some material thickness, the effective area is:

A(eff) = A + P * t

Here A is the area of the polygons and P is their perimeter. t is the "thickness" in micrometer units. To specify such a condition, use the following notation:

errors = antenna_check(area_and_perimeter(gate, 0.5), ...)

"area_and_perimeter" takes the polygon layer and the thickness (0.5 micrometers in this case). This notation can be applied to both gate and metal layers. A detailed notation for the usual, area-only case is available as well for completeness:

errors = antenna_check(area_only(gate), ...)

# this is equivalent to a zero thickness:
errors = antenna_check(area_and_perimeter(gate, 0.0), ...)
# or the standard case:
errors = antenna_check(gate, ...)

Finally there is also "perimeter_only". When using this specification with a thickness value, the area is computed from the perimeter alone:

A(eff) = P * t

errors = antenna_check(perimeter_only(gate, 0.5), ...)

The error shapes produced by the antenna check are copies of the metal shapes on the metal layers of each network violating the antenna rule.

You can specify a text layer (use "labels" to create one). It will receive error labels describing the measured values and computation parameters for debugging the layout. This option has been introduced in version 0.27.11.

"clear_connections" - Clears all connections stored so far

Usage:

See connect for more details.

"connect" - Specifies a connection between two layers

Usage:

a and b must be polygon or text layers. After calling this function, the Netter regards all overlapping or touching shapes on these layers to form an electrical connection between the materials formed by these layers. This also implies intra-layer connections: shapes on these layers touching or overlapping other shapes on these layers will form bigger, electrically connected areas.

Texts will be used to assign net names to the nets. The preferred method is to use labels to create a text layer from a design layer. When using input, text labels are carried implicitly with the polygons but at the cost of small dummy shapes (2x2 DBU marker polygons) and limited functionality.

Multiple connect calls must be made to form larger connectivity stacks across multiple layers. Such stacks may include forks and joins.

Connections are accumulated. The connections defined so far can be cleared with clear_connections.

"connect_explicit" - Specifies a list of net names for nets to connect explicitly

Usage:

Use this method to explicitly connect nets even if there is no physical connection. As this breaks with the concept of physical verification, this feature should be used with care.

The first version of this function will connect all nets listed in the "net_names" array in the top level cell. The second version takes a cell name pattern and connects all nets listed in "net_names" for cells matching this pattern.

A use case for this method is the following: consider a set of standard cells. These do not have a bulk or n-well pin in the schematics. They also do not have build in tie-down diodes for the substrate connections. In this case there is a build-in discrepancy between the schematics and the layout: bulk and VSS are separate nets within the layout, but the schematic does not list them as separate. The solution is to make an explicit connection between VDD and n-well and VSS and bulk, provided VDD and VSS are properly labelled as "VDD" and "VSS" and n-well and bulk are accessible as named nets (for bulk you can use "connect_global").

The following code will establish an explicit connection for all cells called "INV.." between BULK and VSS nets:

connect_global(bulk, "BULK")
...
connect_explicit("INV*", [ "BULK", "VSS" ])

Explicit connections also imply implicit connections between different parts of one of the nets. In the example before, "VSS" pieces without a physical connection will also be connected.

When you use explicit connections you should make sure by other ways that the connection is made physically. For example, for the bulk/n-well pin example above, by enforcing at least one tie-down diode per n-well island and in the substrate by means of a DRC rule.

The explicit connections are applied on the next net extraction and cleared on "clear_connections".

"connect_global" - Connects a layer with a global net

Usage:

Connects the shapes from the given layer l to a global net with the given name. Global nets are common to all cells. Global nets automatically connect to parent cells throughs implied pins. An example is the substrate (bulk) net which connects to shapes belonging to tie-down diodes. "l" can be a polygon or text layer.

"connect_implicit" - Specifies a search pattern for labels which create implicit net connections

Usage:

Use this method to supply label strings which create implicit net connections on the top level circuit in the first version. This feature is useful to connect identically labelled nets while a component isn't integrated yet. If the component is integrated, nets may be connected on a higher hierarchy level - e.g. by a power mesh. Inside the component this net consists of individual islands. To properly perform netlist extraction and comparison, these islands need to be connected even though there isn't a physical connection. "connect_implicit" can achive this if these islands are labelled with the same text on the top level of the component.

In the second version, the pattern can be specified for a cell range (given by a cell name pattern or a single cell name). These pattern are applied to non-top cells. The unspecific pattern has priority over the cell-specific ones. As the cell selector is a pattern itself, a single cell may fall into more than one category. In this case, the label filters are combined.

The implicit connections are applied on the next net extraction and cleared on "clear_connections".

"device_scaling" - Specifies a dimension scale factor for the geometrical device properties

Usage:

Specifying a factor of 2 will make all devices being extracted as if the geometries were two times larger. This feature is useful when the drawn layout does not correspond to the physical dimensions.

"extract_devices" - Extracts devices based on the given extractor class, name and device layer selection

Usage:

Runs the device extraction for given device extractor class. In the first form, the extractor object is given. In the second form, the extractor's class object and the new extractor's name is given.

The device extractor is either an instance of one of the predefined extractor classes (e.g. obtained from the utility methods such as mos4) or a custom class. It provides the algorithms for deriving the device parameters from the device geometry. It needs several device recognition layers which are passed in the layer hash.

Predefined device extractors are:

Each device class (e.g. n-MOS/p-MOS or high Vt/low Vt) needs its own instance of device extractor. The device extractor beside the algorithm and specific extraction settings defines the name of the device to be built.

The layer hash is a map of device type specific functional names (key) and polygon layers (value). Here is an example:

deep

nwell   = input(1, 0)
active  = input(2, 0)
poly    = input(3, 0)
bulk    = make_layer   # renders an empty layer used for putting the terminals on

nactive = active - nwell  # active area of NMOS
nsd     = nactive - poly  # source/drain area
gate    = nactive & poly  # gate area

extract_devices(mos4("NMOS4"), { :SD => nsd, :G => gate, :P => poly, :W => bulk })

The return value of this method will be the device class of the devices generated in the extraction step (see DeviceClass).

"l2n_data" - Gets the internal LayoutToNetlist object

Usage:

The LayoutToNetlist object provides access to the internal details of the netter object.

"netlist" - Gets the extracted netlist or triggers extraction if not done yet

Usage:

If no extraction has been performed yet, this method will start the layout analysis. Hence, all connect, connect_global and connect_implicit calls must have been made before this method is used. Further connect statements will clear the netlist and re-extract it again.